Development of Superconducting Fault-Tolerant Quantum Computer Systems

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ABOUT

MOONSHOT

Moonshot Goal 6

Realization of a fault-tolerant universal quantum computer that will revolutionize economy, industry, and security by 2050.

In this project, we aim to develop designing and manufacturing technologies of devices and equipment, which are necessary to realize the goal of the Moonshot program #6: realize a fault-tolerant universal quantum computer by 2050 that can solve problems which conventional computers cannot solve on a realistic timescale.

More specifically, in order to fully utilize a quantum bit (qubit) consisting of a superconducting circuit, we are going to establish technique of connecting qubit chips located at extremely low temperature and electronics equipment controlling them, improve quality of the qubit chip itself, and develop novel superconducting qubit chips which can be more easily handled.

What is a quantum computer?
In conventional computers, information is expressed as multiple bits, each of which stores 0 or 1 (classical bit). Then calculation is performed by logic gate operation on these classical bits. In quantum computers on the other hand, by using a so-called quantum superposition of 0 and 1 states (qubit), quantum logic gate operations on these qubits has effectively the same effect as if the parallel classical computation were performed simultaneously. So, the quantum computer can solve a kind of problems that conventional computers cannot solve on a realistic timescale. The quantum computer is considered to be suitable for dealing with complex and large-scale problems, such as actual natural and social phenomena.
Application of a quantum computer
For example, realizing phenomena occurred in nature or inside living organism by using heat or electricity requires a tremendous amount of energy. A quantum computer can be useful for understanding the mechanism of photosynthesis or developing innovative materials which can serve to reduce energy consumption, which eventually leads to realize an energy-saving sustainable society.
What is a superconducting qubit?
By lowering temperature of a specific metal or compound below a threshold called critical temperature, electrical resistance suddenly vanishes. This phenomenon is called superconductivity. A closed loop consisting of superconductor can maintain a current flow persistently thanks to its zero resistivity. By taking advantage of this phenomenon, a qubit chip can be made of a superconductor, where energy or information can be controlled by applying a magnetic/electric field.

MESSAGE

Recently, there have been world-wide intense research activities to develop superconducting quantum computer.

Towards the realization of practical fault-tolerant quantum computer beyond the NISQ machine, we still need lots of breakthroughs for the integration of the superconducting circuit.

The required technologies are related not only to the qubit device itself,but also to its peripherals such as control electronics, packaging, and refrigerator.

In this project, through the collaboration among groups with different expertises, those technologies are developed and optimized for the total system of future quantum computer.

Tsuyoshi Yamamoto

Project Manager

G-QuAT, National Institute of Advanced Industrial Science and Technology
Joint Appointed Fellow

ORGANIZATION

organizationoverseas partner

Development of Integration Technologies for Superconducting Quantum Circuits Project Management Office

1-1-1 Umezono, Tsukuba, Ibaraki 305-8568 Japan
NEC-AIST Quantum Technology Cooperative Research Laboratory, AIST Tsukuba Central 2

MEMBER

Atsushi Noguchi
System-level manufacturing technology that balances coherence, integration, and uniformity; reduction of system-level variation through digital-assisted analog technology

Atsushi Noguchi

RIKEN

Team Leader

Team Member
Shiro Saito
System-level manufacturing technology that balances coherence, integration, and uniformity

Shiro Saito

NTT Basic Research Laboratories

Senior Distinguished Researcher

Team Member
Fumiki Yoshihara
System-level manufacturing technology that balances coherence, integration, and uniformity

Fumiki Yoshihara

Tokyo University of Science

Professor

Toshiaki Inada
System-level manufacturing technology that balances coherence, integration, and uniformity

Toshiaki Inada

The University of Tokyo

Assistant Professor

Team Member
Go Fujii
System-level manufacturing technology that balances coherence, integration, and uniformity

Go Fujii

G-QuAT, National Institute of Advanced Industrial Science and Technology

Team Leader

Team Member
Munehiro Tada
System-level manufacturing technology that balances coherence, integration, and uniformity

Munehiro Tada

Faculty of Science and Technology, Keio University

Professor

Kiyotaka Mukasa
System-level manufacturing technology that balances coherence, integration, and uniformity

Kiyotaka Mukasa

Kyocera Corporation

Researcher

Tsuyoshi Yamamoto
Reduction of system-level variation through digital-assisted analog technology

Tsuyoshi Yamamoto

G-QuAT, National Institute of Advanced Industrial Science and Technology

Joint Appointed Fellow

Masamitsu Tanaka
Reduction of system-level variation through digital-assisted analog technology

Masamitsu Tanaka

Graduate School of Engineering, Nagoya University

Professor

Team Member
Naoki Takeuchi
Reduction of system-level variation through digital-assisted analog technology

Naoki Takeuchi

Tohoku University

Professor

Team Member
Makoto Miyamura
Reduction of system-level variation through digital-assisted analog technology

Makoto Miyamura

NanoBridge Semiconductor, Inc.

Principal Researcher

Team Member
Yutaka Tabuchi
Co-design of Qubit Operation, Control Devices, and Infrastructure; Enhancing the Performance of Qubit Chips Through High-Density Packaging

Yutaka Tabuchi

RIKEN

Team Leader

Team Member
Hisashi Nakagawa
Co-design of Qubit Operation, Control Systems, and Infrastructure

Hisashi Nakagawa

Research Institute for Physical Measurement, National Institute of Advanced Industrial Science and Technology

Principal Researcher

Team Member
Masamichi Saitoh
Co-design of Qubit Operation, Control Systems, and Infrastructure

Masamichi Saitoh

ULVAC CRYOGENICS INCORPORATED

Manager

Team Member
Yuya Fujiwara
Co-design of Qubit Operation, Control Systems, and Infrastructure

Yuya Fujiwara

ULVAC, Inc. Components Division

Manager

Team Member
Yoshinori Uzawa
Co-design of Qubit Operation, Control Systems, and Infrastructure

Yoshinori Uzawa

Advanced Technology Center, National Astronomical Observatory of Japan

Professor

Team Member
Akira Kawakami
Co-design of Qubit Operation, Control Systems, and Infrastructure

Akira Kawakami

Advanced ICT Research Institute, National Institute of Information and Communications Technology

Senior Researcher

Team Member
Kunihiro Inomata
Co-design of Qubit Operation, Control Systems, and Infrastructure; Operational Verification of Quantum Computer Systems

Kunihiro Inomata

G-QuAT, National Institute of Advanced Industrial Science and Technology

Team Leader

Team Member
Makoto Negoro
Co-design of Qubit Operation, Control Systems, and Infrastructure; Operational Verification of Quantum Computer Systems

Makoto Negoro

QIQB center, OTRI, Osaka University

Professor

Team Member
Hirotaka Terai
Enhancing the Performance of Qubit Chips Through High-Density Packaging

Hirotaka Terai

National Institute of Information and Communications Technology

Senior Researcher

Team Member
Taro Yamashita
Enhancing the Performance of Qubit Chips Through High-Density Packaging

Taro Yamashita

Graduate School of Engineering, Tohoku University

Professor

Team Member
Makoto Konoto
Enhancing the Performance of Qubit Chips Through High-Density Packaging

Makoto Konoto

G-QuAT, National Institute of Advanced Industrial Science and Technology

Senior Researcher

Team Member
Yuichiro Matsuzaki
System-Level Device Modeling Technology

Yuichiro Matsuzaki

Chuo University

Associate Professor

Team Member
Ilkwon Byun
System-Level Device Modeling Technology

Ilkwon Byun

Kyushu University

Associate Professor

Team Member

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